1. Field of the Invention
This invention relates generally to DMOS type semiconductor devices and fabrication methods therefor and, more particularly, to DMOS semiconductor devices that can operate in a different mode and the fabrication methods thereof.
2. Description of the Prior Art
In the past, DMOS type semiconductor structures have been fabricated by the semiconductor industry generally for the purpose of providing high powered MOS or unipolar type devices. These DMOS (double diffused MOS) type devices took on various shapes and configurations.
More recently, a DMOS configuration that became of significant commercial importance is a structure that utilized, for example, a common drain region and a pair of spaced separate source regions each of which was located in a substantially surrounding separate region located within the common drain region with the surrounding separate region being of opposite type conductivity to either the source regions or the drain region. A gate electrode was used to either turn the device on or off depending upon the bias or potential that was applied to the gate electrode. The gate electrode functioned to permit conduction of holes (for P channel type devices) or electrons (for N channel type devices) across the two channels provided by the separated source regions located within the substantially surrounding separate regions of opposite type conductivity.
Alternatively, if desired, the DMOS structure could operate with two drain regions separated from each other and each located within a region of opposite type conductivity thereby providing separate drain regions and a common source region. In this embodiment, which would be like the previously described DMOS device with multiple source regions and a common drain, the difference would be the reversal of use of the source and drain regions.
In any of the above embodiments the surrounding region of opposite conductivity that substantially surrounded the separate source or separate drain region was electrically tied to the separate source or separate drain region. This was normally achieved by the use of a metal ohmic contact material (i.e. aluminum) that was located as an electrical contact across the P N junction separating the separate source or drain region from the surrounding region of opposite type conductivity. Thus, this type of electrical contact served to electrically connect together the separate source or drain regions to the surrounding region of opposite type conductivity.
One problem with the DMOS structure that was previously used was that the DMOS structure had a higher "on" resistance during use than conventional bipolar transistor devices. Another problem is that the operating (I,V) slope provided by the DMOS prior art structure was not a smooth, stable curve when plotting the voltage versus current characteristic operation curve for this type of device, but displayed or provided what is known as a "latchback" type of curve which means that the (I,V) curve for this device did not provide a smooth increasing current for a specific device operating voltage (which was to be substantially linearly increasing in current for a given operating voltage). The "latchback" type of curve that was produced due to the use of the prior art DMOS structure exhibited a decrease in the operating voltage from an initial voltage value thereby causing the curve to take on a "hump" shape configuration designated as a "latchback" curve.
Accordingly, a need existed to provide a DMOS type device that would eliminate the undesired "latchback" characteristics of previous DMOS devices and would have favorable operating characteristics such as a lower "on" resistance when operational.